PASTA

modelling PArallel Systems for Timing Analysis

Project Manager: Prof. dr. ir. Gerard Smit

Faculty of Electrical Engineering, Mathematics and Computer Science - EEMCS

Tel.: +31 53 489 3734

Summary

The aim of the project is to develop techniques for the analysis and synthesis of predictable multi-processor systems. These heterogeneous systems have multi-processor architectures with possibly different types of processors on which hard real-time, soft real-time and best effort applications are executed.

Relevance

The design of complex embedded systems in the consumer domain is lacking support for verification of non-functional requirements, leading to an excessive verification effort by means of simulation, which often results in slipping design schedules. This project will develop techniques to:

·	capture such requirements in an analyzable specification model of the application and

·	use this model to derive an implementation with the minimal resource requirements such that the throughput and end-to-end latency constraints are met.

These techniques will enable the correct and efficient design of heterogeneous parallel systems.

PASTA publications

Project duration: January 2005 – January 2009

Project budget: 160 k-€ (internal project)

Number of person/years: 1 fte

Involved groups: Computer Architecture Design & Test for Embedded Systems (CADTES)

CTIT Strategic Research Orientation: WiSe - Wireless and Sensor Systems